dlh wrote:BTW, how does flash size relate to program memory?
The simple answer is that the more Flash you have the larger your application code can be. The more complete answer is more complicated.
If you look at
this page you'll find a map of the ESP8266 memory space and, farther down the page, a map of the layout of the Flash chip for both non-OTA and OTA configurations.
In the memory map, you'll see that there is "Data RAM" at 0x3ffe800, "Instruction RAM" at address 0x40100000, and "Flash Cache RAM" at 0x40108000. The "Data RAM" is essentially equivalent to RAM on an AVR and the "Instruction RAM" taken together are somewhat like Flash memory on an AVR. However, as suggested by the name, the "Flash Cache RAM" holds different content at different points in the execution of an application. Essentially, parts of the Flash content are copied to the Flash Cache RAM for execution as needed (something like paging). This is what allows an ESP8266 application to be larger than it might at first appear.
When writing an application for the ESP8266 in C, functions that don't have a special tag to indicate that they should be executed from the cache end up in the Instruction RAM. Note, however, that the size of the Instruction RAM is fairly small, only 32KB. If the total size of the code destined for Instruction RAM exceeds 32K the linker will emit an error/warning.
If a function has a special tag,
__attribute__((section(".irom0.text")), it will be copied to the Flash Cache RAM as needed for execution. The maximum aggregate size for cached functions depends on the Flash size
and the recipe given to the linker in the "linker script". When you build a ZBasic application for the ESP8266 the ZBasic compiler generates a custom linker script that takes into account the Flash size you specify.
The default Flash layout for a ZBasic-ESP8266 application for a 512KB Flash chip is shown on
Page 61 of the ZBasic for ESP8266 manual. In the table, you'll see a 64K block beginning at address 0x00000000 described as being the "Application boot image". That block of data contains the code that will be loaded into the "Instruction RAM" as well as data for initializing application data RAM variables. All of the functions marked for caching end up in the "Application ROM code/data" portion, limited to 428K when using a 512KB Flash chip. For larger Flash chips, the size of the "Application ROM code/data" section increases by (FlashSize - 512KB).
Most of the code in the ZBasic System Library for the ESP8266 goes in the cached area. The exceptions are interrupt handlers and some small special purpose blocks of code. By default, all user-written ZBasic procedures are marked for caching except for ISR procedures. There currently is no way to designate that a non-ISR procedure shouldn't be cached. This may be a useful addition.
