ADC acquisition speed

[pjc30943]

Has anyone reduced the ADC sampling time on a native mode 1280 or 1281? 220us is too slow for this app by about a factor four.

Just curious what side-effects or issues you've come across when manually changing the registers per the ATmega datasheet (from the default) to get a shorter integration time.

EDIT: I might consider an external ADC for higher speeds, but the board is already running a few SPI DACs at high rates, so that resource is tied up much of the time.

[dkinzer]

Has anyone reduced the ADC sampling time on a native mode 1280 or 1281?

You'll want to check the datasheet to confirm but I believe that the GetADC() functions uses the smallest possible prescaler (thus yielding the fastest ADC clock allowable) given the processor speed. You may be able to configure it for a faster conversion time if a lower resolution is acceptable.