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1280 SPI CS
Posted: 15 April 2008, 13:43 PM
by pjc30943
There are no dedicated CS pins for SPI on the 1280 as there were on the 1281ae, right? It's not clear whether the 1280/1 requires them fixed in hardware, or if on the 1281ae the pin was just a designation for convenience.
EDIT: clarification: there is support for 4 HW ports, but only one defined CS is included. This actually is exactly the same, then, as the 1281. The (new) question is whether there's a difference between using user-defined CS pins, and the explicitly reserved CS.
Posted: 15 April 2008, 15:09 PM
by mikep
I believe there is no difference. Here is the relevant text from the datasheet:
When configured as a Master, the SPI interface has no automatic control of the SS line. This must be handled by user software before communication can start.
This means the VM must explicitly control the SS line (PB0) and could just as well do this for a user configured chip select pin.
Re: 1280 SPI CS
Posted: 15 April 2008, 16:05 PM
by dkinzer
pjc30943 wrote:the explicitly reserved CS.
The pin that with the SS designation is defined for use as an input when the device is an SPI slave. Any output pin can be used for SS when the device is an SPI master.
Currently, the ZBasic System Library functions do not support slave mode. One could write code for that mode for a native mode device.
Posted: 16 April 2008, 8:54 AM
by pjc30943
Thanks guys; this is clear now.
Posted: 16 April 2008, 12:12 PM
by stevech
was there an issue where the SPI (for any ZBasic product) cannot run at 4MHz (VM issue?)
Posted: 16 April 2008, 14:12 PM
by dkinzer
stevech wrote:was there an issue where the SPI (for any ZBasic product) cannot run at 4MHz (VM issue?)
I don't recall any such problem nor do I see any evidence in the change history. Are you seeing a problem?
Posted: 16 April 2008, 16:14 PM
by mikep
stevech wrote:was there an issue where the SPI (for any ZBasic product) cannot run at 4MHz (VM issue?)
Are you perhaps confused with 8MHz? The SPI bus can only run at a maximum speed of 1/2 clock speed which is of course 7.3828 MHz.
Posted: 16 April 2008, 19:42 PM
by stevech
No SPI issue here.
I'll search the forums to find what I too-vaguely remember about limitations of connecting SPI devices using the VM. Maybe nothing and I'm (again) hosed up.
Posted: 18 April 2008, 15:20 PM
by Don_Kirby
The only speed related SPI issue that I can recall is the 25256 vs 25256A issue, with the former not being fast enough.
-Don
Posted: 18 April 2008, 16:20 PM
by dlh
There was an issue with early versions of the ENC28J60 which had to run SPI at 8MHz or use the same clock for it and the microcontroller. Maybe this is what you were remembering.
Posted: 18 April 2008, 19:26 PM
by stevech
Need more vitamin E