PWM/PWM8 Channel Interaction

[mikep]

It would appear that using PWM8 channel 1 (D.7) also affects the output on PWM channel 1 (D.5) for the ZX-24su. That is, I get an unwanted PWM signal on D.5 as well as D.7 when I use PWM8. Channel 2 does not exhibit this problem. I have verified my circuitry and tested separately on a breadboard. Here is the code to reproduce the problem:

Code: Select all

Sub Main()
	Call OpenPWM8(1, 50.0, zxFastPWM)
	Call OpenPWM(1, 50.0, zxFastPWM)
Do
	Call PWM8(1, 0) ' same effect as PWM
	Call Sleep(0.5)
	Call PWM8(1, 100) ' same effect as PWM
	Call Sleep(0.5)	
Loop
End Sub

[dkinzer]

I believe that the signal that you're seeing on D.5 is being capacitively coupled inside the chip from the D.7 signal. As written, the test case leaves D.5 as a high impedance input. If the test case is modified as shown below, the signal on D.5 disappears.

Code: Select all

Sub Main()
   Call PutPin(D.5, 0)
   Call OpenPWM8(1, 50.0, zxFastPWM)
   Call OpenPWM(1, 50.0, zxFastPWM)
   Do
      Call PWM8(1, 0) ' same effect as PWM
      Call Sleep(0.5)
      Call PWM8(1, 100) ' same effect as PWM
      Call Sleep(0.5)   
   Loop
End Sub

[mikep]

That does seem to help.

Why does OpenPWM not automatically set the port as an output? You would need to either call it twice or set both OCR ports. Worst case add something to the documentation and example code which sets the port as an output, acquires the timer semaphore and then calls OpenPWM.

I have not heard of this before. Is this coupling an "error" in the ATMega1284P design?

[dkinzer]

Why does OpenPWM not automatically set the port as an output?

Because the compiler cannot know what the output state should be for any particular application. Form some designs, the initial state may need to be high and in others, low. As it stands, it is up to the developer to set the state, if necessary, to be appropriate for their application.

I have not heard of this before. Is this coupling an "error" in the ATMega1284P design?

It's nothing more than a signal being induced on another conductor, typically by capacitive coupling. It also know as "crosstalk". The effect can be seen using an oscilloscope. Usually, it doesn't cause a problem because the "noise" perturbs the true signal so slightly that it doesn't cause a transition across logic thresholds. For floating inputs, the effect can easily move the signal across logic thresholds and thus be observed by digital means.

[mikep]

I have not heard of this before. Is this coupling an "error" in the ATMega1284P design?

It's nothing more than a signal being induced on another conductor, typically by capacitive coupling. It also know as "crosstalk". The effect can be seen using an oscilloscope. Usually, it doesn't cause a problem because the "noise" perturbs the true signal so slightly that it doesn't cause a transition across logic thresholds. For floating inputs, the effect can easily move the signal across logic thresholds and thus be observed by digital means.

I know what it is. I am just surprised that Atmel didn't do a better job of eliminating/reducing crosstalk for this type of scenario.