Follow-up:GTBecker wrote:Tony's suggestion of using Compare Match to trigger an interrupt describes a prescaler which inherently reduces the signal resolution by the divider ratio.
Actually the selection of the external counter input (rather than the internal clock) is one of the prescaler options, and results in a 1:1 prescaler value. The counter counts every rising or falling transition (user selected) on the T1 input.
So, there is no loss of the granularity (signal resolution) of the encoder hardware. The OCR1A values does not prescale per-se, but sets the reporting interval, and CTC mode takes care of clearing the counter atomically.
You can adjust the OCR1A value to any arbitrarily lower value if you are finding that the interrupts are coming too infrequently. This is best done during the OC1A interrupt service because the counter value is likely to be small, and you can ratchet up/down the OCR1A value progressively.
To prevent glitching, you need to try to avoid setting the ORC1A lower than the current counter value, or it will miss the interrupt, overflow, and then trigger the interrupt on the next pass. You will have missed 0xFFFF (or is it 0xFFFF+1?) counts entirely.
Even during the OC1A interrupt service, you need to be aware of any latency that may occur. May be as much as 1/512 second, maybe more. At 68KHz encoder signals, the counter could have counted 133 more encoder signals in that time, maybe more. So drastically reducing the OCR1A value might be hazardous.
-Tony