Interface for SPI driven MMC card

spamiam · Post by **spamiam** » 31 October 2006, 18:29 PM

Here is a functioning circuit to interface a SD/MMC card to a ZX. It functions at all the supported SPI speeds.

You use OpenSPI and assign a general I/O pin as the /csPin. This gets routed through logic to control the MOSI, MISO, and SCK signals to the SD/MMC card.

Voltage dividers are used to drop the 5 volts from the ZX to a voltage compatible with the 3.3V SD/MMC card. 2.2K and 3.3K resistors are used. 1.7K instead of the 2.2K would give precisely 3.3volts instead of the 3.0V that this circuit provides. Nonetheless, it functions as-is.

You will also use the ZX's MOSI, MISO, SCK pins. One other general I/O pin will be used to control the card's /CS pin. This is called /MMC-SEL in the schematic.

The problem with SD/MMC cards is that they can not tolerate losing the assertion of its CS signal during an entire transaction, which might entail multiple separate SPICmd() instructions. Between SPICmd() instructions the csPin is de-asserted. This will cause the SD/MMC card to fail to communicate properly.

Therefore, an entirely separate software-controlled signal needs to be sent to the SD/MMC card to maintain assertion between SPICmd() instructions.

If the SD/MMC card remains asserted between SPICmd() instructions, then it will be able to see ALL the SPI traffic, including the communication with the EEPROM. This will completely confuse the card. So, the SPI signals must not be allowed to get to the card unless they are specifically intended for the card.

The csPin will be asserted when the SPI traffic is intended to go to the SD/MMC card. This can be used in conjunction with the MOSI, MISO, and SCK signals to control three AND gates which then pass the signals to the SD/MMC card.

Since the csPin has inverted logic, it must be passed through an inverter so it has positive logic. The inverted csPin signal is sent to one of the inputs on each of three AND gates. The MOSI, MISO, and SCK signals go to the other inputs of each of the three gates.

See the attached schematic to understand how this all works.

-Tony

Post by **dkinzer** » 31 October 2006, 19:16 PM

Congratulations on getting this going.

I'm a little bit suprised that the circuit works as well as it does. The problem that I see is that the output of IC1B will be fighting the other SO outputs, notably that of the SPI EEPROM. At a minimum, you should probably include a series resistor to reduce the effect of the conflict. Other alternatives are to use a transistor, an open-collector inverter/buffer, or a tri-state buffer (e.g. 74HCT125). All of these would prevent the SD card's SO output from interfering with that of other SPI slaves.

mikep · Post by **mikep** » 31 October 2006, 21:32 PM

dkinzer wrote:Other alternatives are to use a transistor, an open-collector inverter/buffer, or a tri-state buffer (e.g. 74HCT125). All of these would prevent the SD card's SO output from interfering with that of other SPI slaves.

If you are going to use a 74HCT125, then is there any reason why it cannot be used for all 4 SPI lines? This has the advantage of eliminating the inverter as well. One further step is to add a 3.3V regulator and use the 74HCT125 with 3.3V which eliminates 6 resistors but probably adds a cap or two. I'm sure this is the reason that Don suggested it over a 74HC125.

spamiam · Post by **spamiam** » 01 November 2006, 4:37 AM

mikep wrote:If you are going to use a 74HCT125, then is there any reason why it cannot be used for all 4 SPI lines? This has the advantage of eliminating the inverter as well. One further step is to add a 3.3V regulator and use the 74HCT125 with 3.3V which eliminates 6 resistors but probably adds a cap or two. I'm sure this is the reason that Don suggested it over a 74HC125.

A tristate buffer would be a nice thing.

I do not understand the siginficance of the differences between the HC and HCT versions. I.E. Why it would require a cap or 2. The limit of my understanding is that there is a difference in fan-out, and speed. THat is about it.

I had been thinking about the use of current limiting resistors on all of the SPI signals. I had them in place initially, but nothing bad happened when I removed them.

What value would be appropriate for the MISO signal. A few K ohms?

-Tony

mikep · Post by **mikep** » 01 November 2006, 8:18 AM

spamiam wrote:
mikep wrote:If you are going to use a 74HCT125, then is there any reason why it cannot be used for all 4 SPI lines? This has the advantage of eliminating the inverter as well. One further step is to add a 3.3V regulator and use the 74HCT125 with 3.3V which eliminates 6 resistors but probably adds a cap or two. I'm sure this is the reason that Don suggested it over a 74HC125.
A tristate buffer would be a nice thing.

I do not understand the siginficance of the differences between the HC and HCT versions. I.E. Why it would require a cap or 2. The limit of my understanding is that there is a difference in fan-out, and speed. THat is about it.

The caps are for the 3.3V regulator. You may also want a decoupling cap on the 74HC125. Google is your friend - here is one of several pages I found that describes the difference between the two.

spamiam wrote:I had been thinking about the use of current limiting resistors on all of the SPI signals. I had them in place initially, but nothing bad happened when I removed them.

It's a safety thing. You don't know you need it until something bad happens and then it is too late.

spamiam wrote:What value would be appropriate for the MISO signal. A few K ohms?

I believe 100 ohms should be fine.

Post by **dkinzer** » 01 November 2006, 8:32 AM

spamiam wrote:I do not understand the siginficance of the differences between the HC and HCT versions.

The most significant difference between the HC and HCT is that the latter was designed with input switching thresholds that are TTL compatible. There is an application note that describes the differences in more detail.

What value would be appropriate for the MISO signal. A few K ohms?

It depends on how much current can be supplied by one device and consumed by the other. Consider the worst-case situation when the IC1B output is at +5 (although it will not be that high) and some other device is trying to pull the line to ground. The limiting resistor will then have a 5 volt drop across it. If it were 4.7K ohms, there would be about 1 mA flowing through it, being supplied by the output stage of IC1B and being sunk by the other device's MISO output. Looking at the spec sheet for the AT25256 EEPROM, it says that the output low voltage when sinking 3.0 mA will be about 0.4 volts. That suggests that it can easily sink the extra 1mA of current from the limiting resistor and still keep the output below the AVR's switching threshold (0.3 * Vcc).

The other consideration is what the voltage drop will be when IC1B is trying to drive the line high or low. The AVR's input current is very low, about 1uA, so the voltage drop across a 4.7K resistor will be negligible.

spamiam · Post by **spamiam** » 01 November 2006, 9:13 AM

Thanks for the refs to the HC vs HCT differences. I have quickly scanned them, and I will look at them in greatrer depth.

I have looked at the spec sheets of these families several (or more) times to try to determine the importsnt differences. I had not noticed that V-High was so divverent between the two.

It appears that the HCT family is not all that appropriate for our uses in interfacing with the ZX. It looks as if its "high" voltage is not enough to be reliable!

If it is true that the HCT has a high of only around 2.x volts (with Vcc of +5), then it may not need and voltage dividers!

I will look at the refs further.

I had been using 3.3K resistors as the current limiters to protect the SPI signals, and they seemed to work OK. Really only the MISO needs the resistor, and 3.3K, 4.7K both look good enough.

-Tony

GTBecker · Post by **GTBecker** » 01 November 2006, 10:01 AM

> ... the important differences.

The 74HCT logic family switches at LS TTL-compatible voltages to
maintain LS noise immunity specs. 74HC can also run at 2v Vcc; 74HCT is
5v logic.

In my experience, 74HC-series parts are most versatile. If though, you
need to _receive_ 74LS logic and maintain critical noise performance,
use a 74HCT part as a buffer to your logic, which can be whatever you
like that works.

Tom

spamiam · Post by **spamiam** » 01 November 2006, 11:00 AM

OK, I checked the data sheets, and here is a summary (TI SN74HC, HCT)

Code: Select all

                     HC                    HCT
V In High           3.15                    2.0
I In Low            1.35                    0.8
Hysteresis          1.8                     1.2

V Out High          4.4                     4.4 - 3.8
V Out Low           0.1                     0.33 - 0.1

The HC family has more input hysteresis and a wider output voltage swing. The HCT will work OK with the ZX input and output voltages, but the HC is probably better.

As far as I can tell, the current specifications are the same.

I will make a new schematic incorporating the HC family, and I will look arounsd for a 74HCT125 in my box of goodies. If I have one, I will test it out. It would be really nice to eliminate the inverter.

Since I already have a 3.3V regulator running the SD card, it would not be a problem powering the 125 with it as well (I need the HC family for that, right?).

I already have the decoupling caps on all the ICs and on the 3.3v regulator, so I do not think I will be increasing the part count.

Probably it would be useful place a pull up resistor on the MISO signal between the ZX and the 74HC125. This should make the "high" level come close to +5. Instead of the +3.3v that it is being powered from.

-Tony

mwf · Post by **mwf** » 02 November 2006, 9:43 AM

I want to clarify the art of translating between different Vcc levels. There appears to be some confusion (at least the way I read the thread.)

To go from 3.3v to 5.0v use a HCT (or AHCT) powered from 5.0v. This draws some current from the supply because the input doesn't go all the way to 5.0v, but otherwise works with good margins. 74HCT125s are good because you can turn off the output so you don't get into conflicts with other chips.

To go from 5.0v to 3.3v use a HC (or AHC) powered from 3.3v. The input of HC can be pulled up above the supply voltage without harm. This is not true of other logic families. Again, 74HC125s are handy.

Do not try to pull the output of any CMOS (except open drain) above the supply voltage since the part attempts to clamp the output to Vcc whether a resistor pulls up or down. You just don't get anything useful but you won't harm anything either.

Another approach is to use a part like the MAX3003 that gives you 8 bidirectional level shifters. It's drawback is that it doesn't supply much current steady state so it needs to output to CMOS and not TTL.

A lot of CMOS parts with "5v tolerant" inputs do not have clamp diodes on the input. A series resistor alone will not save these parts from connection to, say, RS232. You must also use external clamp diodes. If you pull an input too high you can get sudden death of the part but you can also get a slow failure due to charge injection.

spamiam · Post by **spamiam** » 02 November 2006, 10:19 AM

mwf wrote:Do not try to pull the output of any CMOS (except open drain) above the supply voltage since the part attempts to clamp the output to Vcc whether a resistor pulls up or down. You just don't get anything useful but you won't harm anything either.

Thanks for the clarification. You put the info in terms even I can understand!

Does this mean that the output of a 74HC125 running on +3.3V can/should not have a pull-up to +5 on one of its outputs?

I had thought that I had seen something about it being OK to do this in one of the above listed references. I will have to double check.

-Tony

mwf · Post by **mwf** » 03 November 2006, 10:15 AM

If you use a pullup resistor to higher than the chip Vcc you will get the output to go a little higher, but the chip is fighting to hold the output at Vcc through its upper output fet. This fet works both directions and will pull down to Vcc as easily as it pulls the output up to Vcc. This is harmless as long as you don't exceed the current rating on the chip. Some chips will let you pull the output higher than Vcc when the output is tri-stated. Some chips have a diode that clamps the output to Vcc+0.6v even if tri-stated. You would have to try your brand of 74HCT.

A 74C906 open drain chip can be pulled up to 18v or less and make a level translator. They cost too much and you waste power heating up the pullup resistor when the output is low. A 74HCT running on 5v is using less power if battery life is important.

MAXIM makes the http://www.maxim-ic.com/parts.cfm/p/MAX3392E specifically for translating SPI between two voltage levels. If space is an issue, this may be the smallest solution.

spamiam · Post by **spamiam** » 03 November 2006, 12:34 PM

MWF, Thanks for the info. This device is very nice and I had seen it before. I had been thinking of using it in a design using a raw AVR. It would have been used simply as a translator. It would be easy to also use the /CS signal as the enable signal as well. I think I might have to be aware of latency, however.

If I were to include a jumper for another general i/o pin to control the /CS on the MMC card, then the circuit would be applicable to a ZX platform as well as a plain AVR platform.

-Tony