Compiling Problem
Posted: 06 March 2007, 10:16 AM
I have created a project with two files: navigation.bas, and directions.bas
Whenever I try to compile the project, the actual contents of the directions.bas file gets overwritten with the following data:
===== file: navigation.bas
0000 10a000 LODSP 0x00a0 (160)
0003 1b1100 PSHI_W 0x0011 (17)
0006 1ba000 PSHI_W 0x00a0 (160)
0009 1b0000 PSHI_W 0x0000 (0)
000c fe4a SCALL TASK_START
000e 01fdff BRA 000e
Sub Main()
End Sub
0011 06 RET
===== file: directions.bas
Code: 18 bytes, RAM: 0 bytes, Persistent memory: 0 bytes
Target Device: ZX24, Minimum VM version: v1.1.2
RAM size: 1536, heap size: 256
Is this a bug? How can I stop my src files from being overwritten by the compiler? Thanks.
Whenever I try to compile the project, the actual contents of the directions.bas file gets overwritten with the following data:
===== file: navigation.bas
0000 10a000 LODSP 0x00a0 (160)
0003 1b1100 PSHI_W 0x0011 (17)
0006 1ba000 PSHI_W 0x00a0 (160)
0009 1b0000 PSHI_W 0x0000 (0)
000c fe4a SCALL TASK_START
000e 01fdff BRA 000e
Sub Main()
End Sub
0011 06 RET
===== file: directions.bas
Code: 18 bytes, RAM: 0 bytes, Persistent memory: 0 bytes
Target Device: ZX24, Minimum VM version: v1.1.2
RAM size: 1536, heap size: 256
Is this a bug? How can I stop my src files from being overwritten by the compiler? Thanks.