ZBasic Forum

Hi Guys, hope you are all well!

With 3x 16bit timers with 4 input/output capture channels each would the 32a4 be able to input capture 8 PWM channels and output 4 PWM (16bit) at the same time?

And are there the pins to do it? Or do i need the 128a1?

Also listed are 2 16bit with 2 input/output channels. Are these free to use, or are these timers used for I2C and software serial etc? As i presume there are no longer any 8 bit timers on these chips?

Cheers

Ben

sturgessb wrote:would the 32a4 be able to input capture 8 PWM channels and output 4 PWM (16bit) at the same time?

The xmega chips have two types of 16-bit timers: type 0 and type1. The difference is that a type - timer has four compare registers wile the type 1 has two compare registers. Consequently, a type 0 timer can generate four simultaneous PWM signals at the same base frequency while a type 1 timer can only generate two simultaneous PWM signals, again at the same base frequency.

The xmegaA4 devices have the following timers: TimerC0, TimerC1, TimerD0, TimerD1 and TimerE0. The letters C, D and E indicate the port on which the compare inputs/outputs are found and the digit indicates the timer type.

On every xmega-based ZX device, one timer (generally a type 1 timer) is used for the RTC. (Another timer is needed if the SW UART channels are used.) On an A4 device like the xmega32A4, that leaves three type 0 and one type 1 timer for other purposes. Generally, a type 1 timer is used for the time-based I/O routines (like SW I2C, PulseOut, etc.) so it would not be available for PWM if those I/O routines are used. Also, the output compare pins conflict with some other functions like HW I2C, SPI, USART, etc. InputCapture() uses a specific compare input for each timer. You may be able to write your own code to implement input capture using other compare inputs. Moreover, the compare inputs share the same pins as compare outputs so those uses are mutually exclusive.

sturgessb wrote:And are there the pins to do it? Or do i need the 128a1?

The mega1281 has eight 16-bit timers, four of each type. It may be better suited for your application if you need lots of timer-based functionality.

sturgessb wrote:As i presume there are no longer any 8 bit timers on these chips?

Correct. All the timers are 16-bit timers on the xmega.

See the Timer Usage Chart for more specific details.

Thanks Don

I think the 128a1 is a better bet yes. And i presume with all those pins, the input capture and output capture have their own pins?

so 8in and 4out should be possible.

its not the end of the world if not, as i can use a separate IC for that, just trying to reduce parts.

Ben

sturgessb wrote:And i presume with all those pins, the input capture and output capture have their own pins?

Sorry, no. TimerC0, for example, on the xmega128a1 has compare outputs/capture inputs on pins C.0, C.1, C.2 and C.3. While it might be possible to write special code to use C.0 as a capture input while C.1, C.2 and C.3 are being used for PWM output, the ZBasic System Library routines won't let you do that. If you invoke InputCaptureEx() using C.0 as the input, attempting to set up PWM on C.1, C.2 and C.3 will fail because the timer is "busy".

sturgessb wrote:so 8in and 4out should be possible.

Not without writing your own special input capture code. With the ZX-128a1 you could have 7 simultaneous input captures going but that use all seven available timers (the eighth being used for the RTC). As I indicated before, each timer only supports one input capture using the ZBasic System Library routine InputCapture() - see the description of InputCaptureEx() for the details. In contrast, each timer can support either 2 or 4 simultaneous PWM outputs (for type 1 and type 0 timers, respectively) all having the same base frequency. See the descriptions of OpenPWM() and PWM() for more details.

Thanks again Don, I understand fully now.

So i either need to use another IC to encode the 8pwm to PPM and then use 2 timers for 8pwm outputs, or use a completely separate pwm IC like Cam's umPWM.

Cheers

Ben