Transistor switching question and PulseOut()

spamiam · Post by **spamiam** » 31 January 2012, 15:03 PM

This question might belong in the general ZBasic category. I have some generic transistors (2n3904 and 2n3906) than could be on simultaneously (sort of in a totem pole configuration). I don't want them to be on simultaneously.

Now these supposedly are pretty fast with 250MHz switching, but if they were a lot slower for some reason, e.g. 4MHz, then would it be a problem in I switch one OFF and the next program statement (native mode or C) switch the other ON.

I think that the Off and On signals will come just a clock or 2 apart. IOW, at least at a speed of 7.3MHz. The slow transistors switch more slowly than that, so it might be possible for both to be partly ON at the same time. It would only be brief, but I guess that it would not be "good" to have happen anyway.

What is done about this by real engineers?

If I want to create a very short delay, the equivalent of a "NOP" in C or Assembler, how do I do that in ZBasic? I see PulseOut is only good for about 2uS (29 clocks?) which is longer than I would prefer. Do we know the precise shortest duration of a PulseOut in clock cycles and what arg would I give PulseOut for get it?

-Tony

twesthoff · Post by **twesthoff** » 31 January 2012, 15:31 PM

I'm not sure exactly what you want to do, but to avoid them both being on at the same time, use just one I/O pin and build a totem-pole stage.

If you are using a native mode device you can use NoOp() for a short delay.

spamiam · Post by **spamiam** » 31 January 2012, 15:49 PM

twesthoff wrote:I'm not sure exactly what you want to do, but to avoid them both being on at the same time, use just one I/O pin and build a totem-pole stage.

If you are using a native mode device you can use NoOp() for a short delay.

Thanks for the reply. The fact that you can drive two complementary transistors from the same signal means that the transition time between on and off, when both transistors will be partly on, is not a significant issue.

Thanks for pointing me to the NoOp()! I had not seen it.

-Tony

Post by **dkinzer** » 31 January 2012, 16:32 PM

spamiam wrote:The fact that you can drive two complementary transistors from the same signal means that the transition time between on and off, when both transistors will be partly on, is not a significant issue.

It can be, depending on the characteristics of the transistor. The parameters of interest are the Delay Time (for turning on) and Storage Time (for turning off). For the 2N3904, the Delay Time is 35nS max. and the Delay Time is 200nS max., both specified at a collector current of 10mA and Vcc of 30V. I didn't look at the specifications for the 2N3906 but I would expect to see similar, if not identical, values. In broad terms, this means that you could have a period of 165nS or more when both transistor are conducting, leading to current spikes, aka switching noise.

This issue particularly plagued the 74S series TTL devices, known for their switch noise. The 74LS series was an attempt to get speeds closer to those of the 74S series while reducing current draw and switching noise. The 74LS series was arguably the most successful of the different 74xx lines, at least prior to the 74HC and 74HCT lines.

You can reduce the effect of this issue by reducing the drive current to just beyond that necessary to put the transistor into saturation, which value of course, depends on the gain of the transistor and the collector current. If the spikes are still problematic, you may need to control the transistors with separate outputs as you originally intended. You can use external XOR gates to prevent both from being on accidentally.

Also, you may have better luck with MOSFETs because the turn off and turn on time are not as far apart.

spamiam · Post by **spamiam** » 31 January 2012, 17:25 PM

Don,

Thanks for the extra info. so, it looks as if adding a short delay between turning one off and the other on is a good idea.

On a VM chip, what is the way to get the shortest delay?

-Tony

Post by **dkinzer** » 31 January 2012, 18:59 PM

spamiam wrote:it looks as if adding a short delay between turning one off and the other on is a good idea.

Possibly. How would the load (being driven by the totem pole) react to a short period of "no drive", that is, not being actively driven high nor actively being driven low?

spamiam wrote:On a VM chip, what is the way to get the shortest delay?

Consider the code below which toggles two different output pins (assuming they've previously been configured to be outputs). On a ZX-24p, the delay from the first pin changing to the second pin changing is about 9.6uS.

Code: Select all

Register.PinA = &H80
Register.PinA = &H40

If the direct writes to the PinA register are replaced with calls to PutPin(), the delay is about 21uS.

spamiam · Post by **spamiam** » 01 February 2012, 5:33 AM

Possibly. How would the load (being driven by the totem pole) react to a short period of "no drive", that is, not being actively driven high nor actively being driven low?

Well, in the case of my particular circuit, the current is limited to 50mA, so it would not be a problem. If the current were going to be higher, and the inputs were not driven for a long time, then the transistors would fry.

On a ZX-24p, the delay from the first pin changing to the second pin changing is about 9.6uS.
Code:

That is longer than I had planned on the delay between turning one off and the other on. Even a really slow 1MHz power transistor has a storage time of 5uS, so 9.6uS is fine.

The side effect of this issue is significant for my project. I am building an Equivalent Series Resistance meter (with a schematic very similar to the design by Bob Parker). It uses an 8uS pulse to briefly charge a capacitor. Assuming the capacitor is discharged when tested, then the voltage across the cap is proportional to the ESR.

But if the minimum time between turning a pin on then off is 9.6uS, then I can not achieve that rather short pulse time. I had thought about turning a pin on, then doing a ~8uS pulse out, then turning it off. Clearly, that will not be effective!

I had also considered setting up a timer to have a 8uS high time and a 492uS low time. Then I could poll the output pin for a falling edge, then when found, check the comparator interrupt flag to see if it saw a transition. the precise duration of the pulse is not too important, but the repetition rate is pretty important. It needs to be close to 2KHz.

What this tells me, the timing is so tight that I need to reconsider how I am achieving the result. This will be a little harder than I thought. Isn't that always true. I probably need to use a timer with a 8us pulse and a 500uS period. I may need to use two channels to control the two transistors independently. This will be fun.

-Tony

twesthoff · Post by **twesthoff** » 01 February 2012, 7:04 AM

I suppose you are trying to minimize hardware, but you could use a one-shot IC to create a fixed pulse and trigger it with your I/O pin. There are several one-shot IC's to choose from.

kararsiz · Post by **kararsiz** » 14 August 2013, 13:18 PM

The switching delay between the transistors is not an issue even at frequencies much higher than 4Mhz. Using mentioned technique will not give you any issues because any amount of current supply will be enough, this isn't a big current draining circuitry. You can simply use a 555timer in mono-stable mode if you want more clarification.

turnkey pcb assembly

DocJC · Post by **DocJC** » 01 September 2013, 10:40 AM

Another option might be to look at the AVR Xmega.

I believe the Xmegas have an "Advanced Waveform Extension" (AWeX) mode which generates complimentary outputs on two pins with a built-in "dead time" to prevent "shoot-through" currents.

I've not used it, or looked at the operating ranges, but it might be worth a look.

JC