reserved I/O pins for VM?

Discussion specific to the 24-pin ZX microcontrollers, e.g. ZX-24r, ZX-24s and ZX-24t.
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stevech
Posts: 715
Joined: 22 February 2006, 20:56 PM

reserved I/O pins for VM?

Post by stevech »

Is there an explanation in the docs (apologies if I've overlooked it) on when these pins cannot be used because the VM relies on these jumpers:

PD2/INT0 is jumpered to PC6/TOSC1

PD3/INT1 is jumpered to PC1/SDA

PD6/ICP is jumpered to PC0/SCL

PB1/T1 is jumpered to PC7/TOSC2

PB2/AIN0 is jumpered to PA2/ADC2


In particular, I'd like to use INT0 and INT1 and I'm not sure if the VM uses these for something or when some user program function call is done such as software UARTs.
dkinzer
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Location: Portland, OR

Post by dkinzer »

The VM doesn't rely on the pins being connected and there is no requirement for them to be connected. It's just that on a 24-pin package there were no pins left to bring out the additional functionality. ZX-40 and ZX-44 users can use INT0 independently of Port C Bit 6 but a ZX-24 user must give up Port C Bit 6 functionality in order to use INT0. The same applies to the other pins mentioned.
- Don Kinzer
stevech
Posts: 715
Joined: 22 February 2006, 20:56 PM

Post by stevech »

thanks. onward I go.
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